method for producing silicon power diodes involves cutting number of individual diodes from a silicon wafer that has been doped on both sides with an n- or p-type dopant in full-surface doping steps to generate a pn junction and subsequently plated all over on both sides, by first sawing the entire wafer into squares or hexagons measuring roughly 5×5 mm2 and then suitably building up and electrically bonding such individual silicon surface diodes. The silicon wafer is doped and plated in an available manner, with the surface plating layer being made, for example, of a chromium-nickel-vanadium-silver alloy (CrNiVAg).
The sawing step, which is necessary to produce individual diodes from the silicon wafer, may results in irregular eruptions on the sawn edge or impurities and damage in the crystal lattice so that the pn junctions in the sawn-out individual diodes are partially or regionally damaged. This damage then leads to higher leakage currents, which, in the end, renders the created diode unusable at this stage.
Therefore, in methods for producing silicon power diodes of this type, the sawing step must be followed by a wet-chemical overetching of the diodes, thus stripping the damaged silicon areas and restoring a suitably intact crystal lattice in the pn junction region.
In such methods, the chemical etch-stripping of the damaged silicon areas may be by passivation of the exposed silicon edge to protect the pn junctions against environmental influences and to reliably prevent the electronic properties from again deteriorating over the life of the diode.
However, it is believed that there are at present no satisfactory means of etch-stripping the damaged silicon areas at the sawn edge. The available wet-chemical etching method results, for example, in unfavorable etching profiles with greater risk of electrical breakdown, due to its pronounced doping selectivity, as well as in disadvantageous yields, due to occasional rejects during etching. In addition, the etching profile produced by wet-chemical etching also reduces the diode's mechanical stability.
Furthermore, according to the available methods, only the fully mounted diodes are exposed to the aqueous etching solution, which involves expensive handling of the individual diodes. To summarize, therefore, the available methods for overetching silicon elements sawn out of a silicon wafer include by the following process steps:
Wet-chemical etching of the sawn-out silicon elements, i.e., diodes, mounting of the diodes, immersion of the mounted diodes in etching baskets into etching basins, neutralization of the etching solution, and subsequent thorough rinsing and drying of the diodes.
The agents needed for these methods are an etching solution, a neutralization solution, and hydrogen peroxide, resulting in serious environmental pollution due to the materials used as well as high energy consumption and the use of de-ionized water. Thus, wet-etching takes place, for example, at temperatures above 90° C., and a rinsing cascade is needed for subsequent cleaning of the etched, mounted diodes.